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| LTC2952 1 2952fb typical application features applications description pushbutton powerpath controller with supervisor the ltc ? 2952 is a power management device that features three main functions: pushbutton on/off control of system power, ideal diode powerpath? controllers and system monitoring. the LTC2952s pushbutton input, which pro- vides on/off control of system power, has independently adjustable on and off debounce times. a simple micro- processor interface involving an interrupt signal allows for proper system housekeeping prior to power-down. the ideal diode powerpath controllers provide automatic low loss switchover between two dc sources by regulating two external p-channel mosfets to have a small 20mv forward drop. high reliability systems may utilize the LTC2952s monitor- ing features to ensure system integrity. these features in- clude: power-fail, voltage monitoring and p watchdog. the LTC2952 operates over a wide operating voltage range to accommodate a large variety of input power supplies. the parts combination of low 20mv external mosfet regula- tion and very low standby current matches battery powered and power conscious application requirements. pushbutton controller with automatic switchover between adapter and battery n pushbutton on/off control n automatic low loss switchover between dc sources n wide operating voltage range: 2.7v to 28v n low 25a shutdown current n guaranteed threshold accuracy: 1.5% of monitored voltage over temperature n adjustable pushbutton on/off timers n simple interface allows graceful p shutdown n extendable housekeeping wait time prior to shutdown n 200ms reset delay and 1.6s watchdog timeout n 8kv hbm esd on pb input n 20-pin tssop and qfn (4mm 4mm) packages n desktop and notebook computers n portable instrumentations n cell phones, pda and handheld computers n servers and computer peripherals n battery backup systems ideal diode vs schottky diode forward voltage drop LTC2952 lt1767-2.5 shdn v out v in pfi g1 vm rst int g1stat pfo kill wde g2 v1 v2 m1 m2 pb en vs ont gnd offt 2952 ta01 adapter, 3v to 25v 2.5v 12v battery si6993dq si6993dq p 365k 511k 100k *68nf *optional **shdn internally pulled up by the lt1767-2.5 *22nf 100k 1k 1k 1k 10k d2 d3 d1 ** forward voltage (v) 0.02 current (a) 0.50 2952 ta01b 0 1 constant voltage schottky diode ideal diode constant r on l , lt, ltc, ltm, linear technology and the linear logo are registered trademarks and powerpath and thinsot are trademarks of linear technology corporation. all other trademarks are the property of their respective owners.
LTC2952 2 2952fb absolute maximum ratings supply voltages v1, v2, vs .............................................. C0.3v to 30v input voltages pb .................................... C6v to max (v1, v2, vs) v ont, offt ............................................... C0.3v to 3v m1, m2, pfi, vm, wde, kill ................... C0.3v to 7v output voltages g1, g2, en .................... C0.3v to max (v1, v2, vs) v g1stat, pfo, rst, int ............................ C0.3v to 7v (notes 1, 2) input currents pb .......................................................C1ma to 100a operating temperature range LTC2952c ................................................ 0c to 70c LTC2952i ............................................. C40c to 85c storage temperature range .................. C65c to 150c lead temperature (soldering, 10 sec) ................... 300c order information lead free finish tape and reel part marking package description temperature range LTC2952cf#pbf LTC2952cf#trpbf LTC2952cf 20-lead plastic tssop 0c to 70c LTC2952if#pbf LTC2952if#trpbf LTC2952if 20-lead plastic tssop C40c to 85c LTC2952cuf#pbf LTC2952cuf#trpbf 2952 20-lead 4mm 4mm plastic qfn 0c to 70c LTC2952iuf#pbf LTC2952iuf#trpbf 2952 20-lead 4mm 4mm plastic qfn C40c to 85c consult ltc marketing for parts specified with wider operating temperature ranges. *the temperature grade is identified by a label on the shipping container. for more information on lead free part marking, go to: http://www.linear.com/leadfree/ for more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/ f package 20-lead plastic tssop 1 2 3 4 5 6 7 8 9 10 top view 20 19 18 17 16 15 14 13 12 11 m2 m1 kill vm pfi wde pb rst pfo ont g1stat g1 v1 vs v2 g2 en int gnd offt t jmax = 125c, ja = 90c/w 20 19 18 17 16 6 7 8 top view 21 uf package 20-lead ( 4mm s 4mm ) plastic qfn 9 10 5 4 3 2 1 11 12 13 14 15 vm pfi wde pb rst v1 vs v2 g2 en kill m1 m2 g1stat g1 pfo ont offt gnd int t jmax = 125c, ja = 37c/w exposed pad (pin 21), pcb gnd connection optional pin configuration LTC2952 3 2952fb electrical characteristics the l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at t a = 25c. v1 = v2 = vs = 2.7v to 28v unless otherwise noted. (notes 2, 3) symbol parameter conditions min typ max units v max operating supply voltage v1, v2 or vs l 2.7 28 v i in_off quiescent supply current both ideal diodes switched off (m1 = open, m2 = 0v) v1 = 2.7v to 28v, v2 = 0v, vs = open or v2 = 2.7v to 28v, v1 = 0v, vs = open. measured current at v1 or v2. l 24 60 a v1 = 2.7v to 28v, v2 = 3.5v, vs = open. measured current at v1. l 515 a v1 = 2.7v to 28v, v2 = 3.5v, vs = open. measured current at v2. l 23 50 a i in_on quiescent supply current both ideal diodes switched on (m1 = 0v, m2 = 0v) v1 = vs = 2.7v to 28v, v2 = 0v or v2 = vs = 2.7v to 28v, v1 = 0v. measured combined current at v1 and vs or v2 and vs. l 65 170 a v2 pref_th v2 preferential threshold voltage (m1 = open, m2 = 0v) (note 4) v1 = 28v, vs = open. l 3.3 3.8 v i leak v1, v2 and vs inter pin leakage to the highest supply v1 = 28v, v2 = vs = 0v; v1 = vs = 0v, v2 = 28v; v1 = v2 = 0v, vs = 28v 3 a ideal diode function v fr ideal diode powerpath forward regulation voltage (v1 or v2) C vs, 2.7v (v1 or v2) 28v l 10 20 35 mv v rto ideal diode powerpath fast reverse turn-off threshold voltage (v1 or v2) C vs, 2.7v (v1 or v2) 28v ?i g C100a/mv l C20 C35 C64 mv i g(src) gate turn-off current g1 = g2 = v max C 1.5v l C2 C5 C10 a i g(snk) gate turn-on current v1 = v2 = 2.7v to 28v, vs = (v1 or v2) C 40mv, g1 = g2 = v max C1.5v. l 2 5 10 a i g(fastsrc) gate fast turn-off source current v1 = v2 = 2.7v to 28v, vs = (v1 or v2) + 0.1v, g1 = g2 = v max C1.5v. l C0.5 C2.5 C10 ma i g(fastsnk) gate fast turn-on sink current v1 = v2 = 5v to 28v, vs = (v1 or v2) C 0.1v, g1 = g2 = v max C 1.5v. l 0.3 0.7 2 ma v g(on) gate clamp voltage i gx = 2a, v x = 8v to 28v, vs = v x C 0.1v measure v x C v gx l 678 v v g(off) gate off voltage i gx = C2a, v x = 2.7v to 28v, vs = v x + 0.1v measure v max C v gx l 0.2 0.4 v t g(on) gate turn-on time v g(off) to v gs C3v, c gate = 1nf (note 5), v1 = v2 = 12v 0.1 2.5 10 s t g(off) gate turn-off time v g(on) to v gs C1.5v, c gate = 1nf (note 6), v1 = v2 = 12v 0.1 2.5 10 s pushbutton pin (pb) v pb(voc) pb open-circuit voltage i pb = C1a l 146 v i pb pb input current v pb(voc) < v pb 28v 0v v pb < v pb(voc) l l C1 C10 1 C25 a a v th_pb pb input threshold voltage pb falling from high to low l 0.65 0.77 0.8 v v hys_pb pb input hysteresis l 10 25 150 mv LTC2952 4 2952fb electrical characteristics the l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at t a = 25c. v1 = v2 = vs = 2.7v to 28v unless otherwise noted. (notes 2, 3) symbol parameter conditions min typ max units debounce time pins (ont, offt) i ont,offt ont/offt pull-up/pull-down current when timer is active v ont, v offt = 0v (pull-up), v ont, v offt = 1.5v (pull-down) l 1.6 2.0 2.4 a t db,on/off internal default on-time/off-time t db,on : c ont = open, measured time between pb low en high, t db,off : measured time between pb low int low l 18 26 34 ms t ont,offt additional adjustable turn-on/turn- off time (note 7) c ont = 1500pf, c offt = 1500pf l 10 15 20 ms accurate comparator input pins (vm, pfi, m1, m2, kill) v th_vm vm input reset threshold both falling and rising l 0.492 0.500 0.508 v v th pfi, m1, m2, kill input threshold voltage falling l 0.492 0.500 0.508 v v hys pfi, m1, m2, kill input hysteresis l 51525 mv i in_lkg vm, pfi, m2, kill input current v = 0.5v l 0.1 a i m1_src m1 input pull-up current m1 = 1v l C1.5 C3 C5 a v m1(voc) m1 voltage open-circuit l 146 v i m1_lkg m1 input leak current m1 = 6v l 0.1 a watchdog/extend pin (wde) v wde(h,th) input high threshold voltage l 1.5 v v wde(l,th) input low threshold voltage l 0.3 v i wde(in,hl) high low input current (note 8) l 25 a i wde(in,hz) hi-z input current v wde = 0.7v, 1.1v l 10 a open-drain output pins (g1stat, int, rst, pfo) i out_lkg leakage current v pin = 5v l 1 a v ol voltage output low i pin = 1ma l 0.4 v high voltage open-drain output pin (en) i en(lkg) en leakage current v en = 28v, en sink current off l 1 a v en(vol) en voltage output low i en = 3ma l 0.4 v v1 = 1.2v and/or v2 = 1.2v, i en = 100a l 0.05 0.3 v voltage monitor/watchdog timing t rst reset timeout period l 140 200 260 ms t wde watchdog timeout period l 1.1 1.6 2.1 s t wde(pw min) minimum period between consecutive edges l 510 s t vm(uv) vm undervoltage detect to rst vm less than v th_vm by more than 1% 150 s t pfi pfi delay to pfo pfi more or less than v pfi_th by more than 1% 150 s LTC2952 5 2952fb note 1: stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. exposure to any absolute maximum rating condition for extended periods may affect device reliability and lifetime. note 2: the greatest of v1, v2 or vs is the internal supply voltage (v max ). note 3: all currents into pins are positive; all voltages are referenced to gnd unless otherwise noted. note 4: v2 pref_th is the minimum voltage level at which v2 becomes the preferential source of quiescent current when both of the ideal diodes are off. note 5: vs is stepped from (v1 or v2) + 0.2v to (v1 or v2) C 0.2v to trigger the event. the gate voltages are initially v g(off) . note 6: vs is stepped from v x C 0.2v to v x + 0.2v to trigger the event. gate voltages are initially clamped at v g(on) . note 7: the adjustable turn-on and turn-off timer period is the adjustable debounce period following the internal default-on and default-off timer period, respectively. electrical characteristics the l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at t a = 25c. v1 = v2 = vs = 2.7v to 28v unless otherwise noted. (notes 2, 3) symbol parameter conditions min typ max units p handshake timing t int(min) int minimum pulse width minimum measured time pb rising to int rising l 10 50 250 s t kill (pw) kill minimum pulse width full swing pulse from 5v to 0v l 150 500 s t kill,on blank kill on blanking (note 9) kill = 0v, measured time between en rising en falling l 270 400 530 ms t kill , off wait kill wait time (note 10) kill = 1v, c offt = open , measured time between int falling en falling l 270 400 530 ms t en, lockout enable lockout time (note 11) measured time between en falling en rising l 270 400 530 ms note 8: the input current to the three-state wde pin are the pull-up and the pull-down current when the pin is either set to 3.3v or gnd, respectively. in the open state, the maximum pull-up or pull-down leakage current permissible is 10a. note 9: the turn-on kill blanking time is the waiting period immediately following the en pin switching high; at the end of this period the input to the kill needs to be high to indicate that the system has powered up properly, otherwise the en pin is immediately switched low. note 10: the kill wait time during the power-down process is the wait period immediately following a valid turn-off command until the en pin switches low. note 11: the enable lockout time is the minimum wait time between the last falling edge and the next rising edge on the en pin. LTC2952 6 2952fb ideal diode function C gate turn-on and turn-off time pushbutton debounce times, kill wait time and enable lockout time with kill above threshold kill on blanking with kill below threshold 2952 td01 vs v gx v x = 12v t g(on) t g(off) 10.5v 12v 12v 12.2v 12.05v 11.8v 5.3v 12.2v 12.05v 9v 2952 td03 en 0.5*v pull-up 0.5*v pull-up kill t kill, on blank 2952 td02 en 0.775v 0.5*v pull-up 0.5*v pull-up pb int t kill, off wait t int(min) t en, lockout t ont t db,on t offt t > t ont t db,off t db,on t < t offt t db,off timing diagrams LTC2952 7 2952fb pfi and pfo wde minimum pulse width vm, wde and rst 2952 td06 vm wde rst t rst 200ms t wde 1.6s t rst 200ms LTC2952 9 2952fb typical performance characteristics typical transient duration vs comparator overdrive (vm, kill, pfi, m1 and m2) comparator overdrive voltage (% of v th ) 0.1 typical transient duration (ms) 1 0.01 1 10 100 2952 g10 0.01 0.1 10 comparator trips above curve kill on blanking, kill wait time, enable lockout time vs temperature at different input voltages C50 C25 320 360 400 440 480 25 0 75 100 2952 g11 50 125 temperature (c) t kill, on blank/ t kill, offwait/ t en, lockout (ms) v1 = v2 = vs = 28v v1 = v2 = vs = 2.7v reset timeout period vs temperature at different input voltages C50 C25 140 160 200 180 220 240 260 25 0 75 100 2952 g12 50 125 temperature (c) t rst (ms) v1 = v2 = vs = 28v v1 = v2 = vs = 2.7v watchdog time period vs temperature at different input voltages C50 C25 1.2 1.4 1.6 1.8 2.0 25 0 75 100 2952 g13 50 125 temperature (c) t wde (s) v1 = v2 = vs = 28v v1 = v2 = vs = 2.7v g1stat, pfo, int and rst pull- down current vs supply voltage 05 0 1.0 3.0 2.0 4.0 5.0 15 10 25 30 2952 g14 20 supply voltage - v max (v) pulldown current (ma) v1 = v2 = vs = v max pin at 150mv pin at 50mv g1stat, pfo, int and rst voltage output low vs pull-down current at different temperatures 05 0 0.5 1.5 1.0 2.0 2.5 15 10 25 30 2952 g15 20 pull down current (ma) v ol (v) v1 = v2 = vs = 12v 130c 90c 25c C45c C60c en pull-down current vs supply voltage 05 0 2 6 4 8 10 15 10 25 30 2952 g16 20 supply voltage - v max (v) pulldown current (ma) v1 = v2 = vs = v max en at 150mv en at 50mv en pull-down current vs supply voltage 0 0.2 0.001 0.1 0.01 100 10 1 1000 10000 0.80.6 0.4 1.41.2 1.6 2952 g17 1 supply voltage - v max (v) pulldown current (a) v1 = v2 = vs = v max en at 150mv en at 50mv en voltage output low vs pull-down current at different temperatures 010 0 0.5 1.5 1.0 2.0 2.5 30 20 60 70 2952 g18 5040 pull down current (ma) v en (vol) (v) v1 = v2 = vs = 12v 130c 90c 25c C45c C60c t a = 25c, unless otherwise noted. LTC2952 10 2952fb pin functions en (pin 14/pin 11): dc/dc enable output. this pin is a high voltage open-drain pull-down used to control system power. en pin goes high impedance after an initial turn-on command (via either the digital on or a valid pushbutton onrefer to the applications information section). en pin pulls low at the end of a valid power-down sequence, or when kill pin is driven low anytime after a valid power-up sequence.this pin can connect directly to a dc/dc converter shutdown pin that provides an internal pull-up. otherwise a pull-up resistor to an external supply is required. the voltage can not exceed the absolute maximum voltage of both the pin and the circuit it is driving. exposed pad (pin 21, qfn package): the exposed pad may be left open or connected to device ground. g1 (pin 19/pin 16): primary p-channel mosfet gate drive output. when the primary ideal diode function is enabled and in regulation, the ideal diode controller drives this pin to maintain a forward voltage (v fr ) of 20mv between the v1 and vs pins. when another power source is driving the vs pin, causing the voltage level at the vs pin to be greater than the voltage level at the v1 pin or when the primary ideal diode driver is disabled via the mode select input pins, this pin pulls up to the max (v1, vs) voltage, turning off the primary p-channel power switch. leave this pin open when primary ideal diode function is not used. g1stat (pin 20/pin 17): open-drain primary ideal diode status output. when the primary p-channel power switch is off, the g1stat pin will go from an open state to a strong pull-down. this pin can be used to signal the state of the primary ideal diode powerpath to a microcontroller. leave this pin open or tied to gnd when unused. g2 (pin 15/pin 12): secondary p-channel mosfet gate drive output. when the secondary ideal diode function is enabled and in regulation, the ideal diode controller drives this pin to maintain a forward voltage (v fr ) of 20mv between the v2 and vs pins. when another power source is driving the vs pin, causing the voltage level at the vs pin to be greater than the voltage level at the v2 pin or when the secondary ideal diode driver is disabled via the mode select input pins, this pin pulls up to the max (v2, vs) voltage, turning off the secondary p-channel power switch. leave this pin open when secondary ideal diode function is not used. gnd (pin 12/pin 9): device ground. int (pin 13/pin 10): interrupt output. this pin is an open-drain pull-down pin used to signal the system that a power shutdown is imminent. the int pin asserts low 26ms after the initial falling edge of the pushbutton off event and during the power-down sequence. leave this pin open or tied to gnd if interrupt signal is unused. kill (pin 3/pin 20): system power shutdown input. set- ting this pin low asserts the en pin low. in modes where m1 is above threshold, setting this pin low also shuts off the ideal diodes. during system turn-on, input to this pin is ignored until 400ms (t kill,on blank ) after the en pin first becomes high impedance. this pin has an accu- rate 0.5v falling threshold and can be used as a voltage monitor input. m1 (pin 2/pin 19): mode select input 1. input to an ac- curate comparator with 0.5v falling threshold and 15mv hysteresis. has a 3a internal pull-up to an internal supply (4v). together with m2 determines the ideal powerpath and on/off control behavior of the part. refer to the operation and applications information sections for configurations based on the voltage levels at m1 and m2. m2 (pin 1/pin 18): mode select input 2. high imped- ance input to an accurate comparator with 0.5v falling threshold and 15mv hysteresis. when m1 is low, m2 controls whether the primary (g1) ideal diode function is enabled. when m1 is high, m2 acts as a digital on/off control input: a rising edge on this pin is interpreted as a turn-on command and a falling edge is interpreted as a turn-off command. refer to the operation and applica- tions information sections for configurations based on the voltage levels at m1 and m2. offt (pin 11/pin 8): off timing input. attach 110pf of external capacitance (c offt ) to gnd for each additional millisecond of turn-off debounce time beyond the internally set 26ms. leave open if additional debounce time is not needed. ont (pin 10/pin 7): on timing input. attach 110pf of external capacitance (c ont ) to gnd for each additional millisecond of turn-on debounce time beyond the inter- nally set 26ms. leave open if additional debounce time is not needed. (tssop/qfn) LTC2952 11 2952fb pb (pin 7/pin 4): pushbutton input. input to a comparator with 0.775v falling threshold and 25mv hysteresis. pb has a 10a internal pull-up to an internal supply (4v). this pin provides on/off power supply control via the en pin, which is typically connected to an external dc/dc con- verter. setting the pb pin low for a time determined by the ont timing capacitor toggles the en pin high impedance. letting this pin toggle high and then setting this pin low again for 26ms asserts int low. after the int pin asserts low, if the pb pin is still held low for a time determined by the offt timing capacitor, the process of turning off the system power begins. at the end of the turn-off process, the en pin is set low. leave this pin open if pushbutton function is not used. pfi (pin 5/pin 2): power fail input. high impedance input to an accurate comparator with a 0.5v falling threshold and 15mv hysteresis. this pin controls the state of the pfo output pin. tie to device gnd if power fail monitoring function is not used. pfo (pin 9/pin 6): power fail output. this pin is an open- drain pull-down which pulls low when the pfi input is below 0.5v. leave this pin open or tied to gnd if power fail monitoring function is not used. rst (pin 8/pin 5): reset output. this pin is an open-drain pull-down. pulls low when vm input is below 0.5v and held low for 200ms after vm input is above 0.5v. also pulls low for 200ms when the watchdog timer (1.6s) is allowed to time out. leave this pin open or tied to gnd if voltage monitoring function is not used. v1 (pin 18/pin 15): primary input supply voltage: 2.7v to 28v. supplies power to the internal circuitry and is the anode input of the primary ideal diode driver (the cathode input to the ideal diode drivers is the vs pin). a battery or other primary power source usually provides power to this input. minimize the capacitance on this pin in applications where the pin can be high impedance (disconnected or inherent high source impedance). otherwise, an optional bypass capacitor to ground in the range of 0.1f to 10f can be used. v2 (pin 16/pin 13): secondary input supply voltage: 2.7v to 28v. supplies power to the internal circuitry and is the anode input of the secondary ideal diode driver (the cathode input to the ideal diode drivers is the vs pin). a secondary power source such as a wall adapter, usually provides power to this input. minimize the capacitance on this pin in applications where the pin can be high imped- ance (disconnected or inherent high source impedance). otherwise, an optional bypass capacitor to ground in the range of 0.1f to 10f can be used. vm (pin 4/pin 1): voltage monitor input. high impedance input to an accurate comparator with a 0.5v threshold. together with the wde pin controls the state of the rst output pin. tie to device gnd if voltage monitoring func- tion is not used. vs (pin 17/pin 14): power sense input. this pin supplies power to the internal circuitry and is the cathode input to the ideal diode drivers (the anode inputs to the ideal diode drivers are the v1 and v2 pins). bypass this pin to ground with one or more capacitors of at least 0.1f. wde (pin 6/pin 3): watchdog/extend input. a three-state input pin. a rising or falling edge must occur on this pin within a 1.6s watchdog timeout period (while the rst output is high impedance), to prevent the rst pin from going low. the watchdog function of this pin is disabled when both of the ideal diode drivers are disabled in certain powerpath configurations (refer to the applica- tion information section). during a shutdown process: a rising or falling edge on this wde pin within the 400ms t kill ,off wait period extends the waiting period another 400ms before the en line is set low. this extend process can be repeated indefinitely in order to provide as much time as possible for the microprocessor to do its house- keeping functions before a power shutdown. leave open or drive in hi-z state with a three-state buffer to disable watchdog or extend function or both. pin functions (tssop/qfn) LTC2952 12 2952fb block diagram cp4 0.5v C + v2 vs v2 g1 g2 gate stat on/off v1 2952 bd ideal diode driver 1 gate ideal diode driver 2 linear gate driver and voltage clamp analog controller internal enable internal enable g1stat en int secondary supply to load primary supply a1 v cc v cc vs v in v in vs vs v1 a2 analog controller linear gate driver and voltage clamp offt ont pushbutton detect logic ldo/band gap ref 0.5v 0.775v m2 cp5 0.5v 3a 10a C + m1 gnd cp3 cp6 0.5v 0.775v C + kill pb + C + C v cc C + push-button oscillator 200ms rst delay/ 1.6s watchdog timer pfi pfo monitors cp2 0.5v wde three-state/ edge detector + C vm cp1 0.5v + C rst 200s filter LTC2952 13 2952fb operation the LTC2952 is designed to simplify applications requiring management of multiple power sources. the three main features of the part are: pushbutton control, ideal diode powerpath controllers and system monitoring. the block diagram on the previous page shows the part divided into its main functional blocks. the pushbutton detect block is responsible for debouncing any pushbutton event on the pb pin. note that the on and off debounce times can be configured independently by using two separate capacitors on the ont and offt pins respectively. a valid pushbutton on event will set the en pin high impedance and a valid off event will drive the en pin low. in a typical application the en pin is tied to the shutdown pin of a dc/dc converter. therefore, by toggling the en pin, the pushbutton pin has a direct control over the enabling/ disabling of an external dc/dc converter. this control of system turn-on/off is done in a graceful manner which ensures proper system power-up and power-down. the ideal diode drivers regulate two external p-channel mosfets to achieve low loss switchover between two dc sources. each driver regulates the gate of the pfet such that the voltage drop across its source and drain is 20mv. when the load current is larger than the pfet ability to deliver such current with a 20mv drop across its source and drain, the voltage at the gate clamps at v g(on) and the pfet behaves like a fixed value resistor. besides providing ideal diode powerpath controllers and control of system power turn-on/off, the LTC2952 also provides system monitoring function via the vm, wde, rst and pfi, pfo pins. the voltage monitoring (vm) and the watchdog (wde) input pins determine the state of the rst output with 200ms reset time and 1.6s watchdog time. the pfi and pfo pins are the input and output of an accurate comparator that can be used as an early power fail monitor. the kill, m1 and m2 pins are the inputs to accurate comparators with 0.5v threshold. the outputs of these comparators interact with the logic block to alter the ideal diode powerpath controllers and the pushbutton control behavior. specifically, the kill input provides the system with a capability to turn off system power at any point during operation. the m1 and m2 pins are mode pins that configure the part to have different behaviors in the powerpath switchover of the two dc sources. figure 1 shows the four different typical configurations of the LTC2952. in configuration a, both of the ideal-diode powerpath controllers are always enabled which results in an automatic switchover between the two dc sources. configuration c is similar to a except for the pushbutton input which now controls both the en pin and the ideal diode powerpath controllers. in configurations b and d, m2 is used as a voltage monitor. in b, when the m2 input is above its threshold the primary ideal diode powerpath is disabled. in d, m2 needs to be above threshold before pb has control over the en pin and the ideal diode powerpath controllers. furthermore in d, the rising and falling edges on m2 are interpreted as turn-on and turn-off commands, respectively. LTC2952 14 2952fb figure 1. four different typical powerpath configurations dc/dc shdn v2 v1 pb en ideal diode 2 ideal diode 1 dc2 dc1 pb detect logic dc/dc shdn v2 v1 pb 0.5v en g1 ideal diode 2 ideal diode 1 dc2 dc1 pb detect logic ideal diode driver 1 m2 + C + C dc/dc shdn v2 v1 pb en g1 and g2 ideal diode 2 ideal diode 1 dc2 dc1 pb detect logic ideal diode driver 1 and 2 dc/dc shdn v2 v1 pb 0.5v en g1 and g2 2952 f01 ideal diode 2 ideal diode 1 dc2 dc1 pb detect logic ideal diode driver 1 and 2 m2 + C + C *external pull-up required ** ** configuration c m1 = 1, m2 = 1 configuration d m1 = 1 configuration a m1 = 0, m2 = 0 configuration b m1 = 0 operation LTC2952 15 2952fb LTC2952 dc/dc shdn g1 g2 v1 v2 m1 m2 s1 pb en vs 2952 f03 q1 adapter to system *q1 and/or q2 pfet can be replaced by a schottky diode with g1 and/or g2 floating **external pull-up required q2 battery * ** g1/g2 v1/v2 g1stat gate stat (only in primary driver) analog controller internal enable on/off vs v in vs 2952 f02 input supply + C output to load + C + C linear gate driver and voltage clamp primary/secondary ideal diode driver a1 applications information figure 3. powerpath configuration a figure 2. detailed ideal diode driver functional block diagram the LTC2952 is a versatile power management ic with pushbutton on/off control and system supervisory fea- tures. the power management function features ideal diode powerpath control that provides low loss switcho- ver between two dc sources. this powerpath control behavior is configurable to satisfy various application requirements. the LTC2952s pushbutton input has independently adjust- able on and off debounce times that control the toggling of a low leakage open-drain enable output and in some configurations, the ideal diode powerpath operation. a simple interface allows for digital on/off control and proper system housekeeping prior to power-down. the LTC2952 also features robust and accurate system supervisory functions that fit high reliability system ap- plications. these supervisory functions include power-fail, voltage monitoring and watchdog reset functions which can be used to monitor power status and ensure system integrity. the ideal diode drivers in a typical application, each of the ideal diode drivers is connected to drive an external p-channel mosfet as shown in the block diagram and figure 2. when power is available at v in and the ideal diode driver is enabled, the ideal diode driver regulates the voltage at the gate to maintain a 20mv difference between v in and vs. as the load current varies, the gate voltage is controlled to maintain the 20mv difference. if the load current exceeds the external pfets ability to deliver the current with a 20mv v ds , then the voltage at the gate clamps and the pfet behaves as a fixed resistor causing the forward voltage to increase slightly as the load current increases. when the vs pin is externally pulled up above the voltage level at v in , the ideal diode driver shuts the external pfet off to prevent reverse conduction. thus when both the primary and secondary ideal diode drivers are enabled, the two ideal diode drivers work together to bring vs to within 20mv of the higher of either v1 or v2. the g1stat pin indicates the status of the primary ideal diode driver. if the external pfet connected to the primary driver is providing power to vs, the g1stat pin is in a high impedance state and when the pfet con- nected to the primary driver is shut-off, the g1stat pin pulls low. powerpath configurations configuration a: pushbutton controller with automatic switchover between wall adapter and battery in this particular configuration both of the m1 and m2 pins are connected to ground. these connections set up the LTC2952 to operate with both of the ideal diodes enabled all the time. in this application, power from the vs node to the system is controlled through the en pin connected to a shutdown LTC2952 16 2952fb applications information pin of a dc/dc converter. the pb input achieves powerpath control by toggling this en pin. note that in this application both of the ideal diodes are enabled all the time, therefore either q1 or q2 can be replaced by schottky diodes as long as the voltage drop across the schottky diodes and their reverse leakage cur- rents are acceptable. configuration b: pushbutton controller with preferential wall adapter operation and automatic switchover to battery in this configuration (figure 4) the m1 pin is connected to ground and the m2 pin is used as a monitor on the wall adapter input to alter the behavior of the ideal diode drivers. when the wall adapter voltage is below the trip threshold, both of the ideal diodes are enabled. when the wall adapter voltage is above the trip threshold, the primary ideal diode driver is disabled (shutting off q1 and q3) and the secondary ideal diode driver is enabled (turning on q2). this means the load current will be sup- plied from the wall adapter (v2) regardless of the voltage level at the battery (v1). if the wall adapter voltage trip threshold is set lower than the battery input voltage level and the wall adapter input can go high impedance, the capacitance on v2 needs to be minimized. this is to ensure proper operation when the wall adapter goes high impedance and q1, q3 is instantly turned on. noting the possible current path through the pfet body diode, a back-to-back pfet configuration must be used for q1, q3 to make sure that no current will flow from the battery (v1) to the vs pin even if the wall adapter (v2) voltage is less than the battery (v1) voltage. configuration c: pushbutton control of ideal diode drivers in this configuration the m2 pin is tied to the m1 pin. since the m1 pin has a 3a internal pull-up current, this current causes both m1 and m2 to pull high. this allows the pb pin to have complete control of both the ideal diode drivers and the en pin. the first valid pushbutton input turns on both of the ideal diode drivers causing the vs pin to be driven to the higher of either the wall adapter or the battery input C providing power to the system directly. conversely, a valid pushbut- ton off input turns off the ideal diodes after the shutdown sequence involving an interrupt to the system. figure 4. powerpath configuration b LTC2952 dc/dc shdn g1 g2 v1 v2 r9 r10 m1 m2 pb en vs 2952 f04 q1 q3 s1 **wall adapter to system *external pull-up required **wall can be less than battery q2 battery * figure 5. powerpath configuration c LTC2952 g1 g2 v1 v2 m1 m2 pb en vs 2952 f05 q1 q3 q4 s1 wall adapter to system battery q2 configuration d: battery backup with pushbutton powerpath controller in this configuration shown in figure 6, the m1 pin is left floating allowing its own 3a internal pull-up to pull itself above threshold. with m1 high, the device operates such that rising and falling edges on the m2 pin are interpreted as digital on and off commands respectively. in figure 6, the m2 pin monitors the wall adapter voltage. when power is first applied to the wall adapter so that the voltage at the m2 pin rises above its rising trip threshold LTC2952 17 2952fb applications information (0.515v), both of the ideal diode drivers and the dc/dc converter are enabled. thus, power is delivered to the system. as soon as the wall adapter voltage falls below its trip threshold, a shutdown sequence is immediately started. at the end of the shutdown sequence, the ideal diode drivers and the dc/dc converter are disabled. thus, power is cut off from the load and the system is in shutdown. note that once power is delivered to the system, the pb pin can be used to turn off the power. if pb is used to turn off the power in this configuration, there are two methods to turn the power back on: a valid pushbutton on event at the pb pin or a recycling of the wall adapter voltage (bringing the voltage level at the m2 pin down below and then back up above its threshold C a digital on command). also note that in this application, the voltage threshold of the wall adapter input (being monitored at the m2 pin) is usually set higher than the battery input voltage. therefore, the only time when power is drawn from the battery (v1 pin) to the load is during the shutdown sequence when the voltage at the wall adapter input (v2 pin) has collapsed below the battery input voltage level. reverse battery protection to protect the LTC2952 from a reverse battery connection, place a 1k resistor in series with the respective supply pin intended for battery connection (v1 and/or v2) and remove any capacitance on the protected pin. figure 7 shows a configuration with a reverse battery protection on the v1 pin. this resistor will limit the amount of current that flows out of the v1 pin when a battery is connected in reverse and protect the part. note however, this reverse battery protection resistor should not be too large in value since the v1 and v2 pins are also used as the anode sense pins of the ideal diode drivers. when the ideal diode driver is on, the vs pin supplies most of the quiescent current of the part (60a typ) and the supply pin supplies the remaining quiescent current (20a typ). therefore, the recommended 1k reverse battery protection resistor amounts to an additional 20mv (1k ? 20a) drop across the p-channel mosfet. in figure 7, when the battery voltage is larger than the wall adapter voltage, the battery supplies the load current to the dc/dc converter. the ideal diode driver regulates g1 to maintain a fixed voltage drop from v1 to vs of 20mv (typ). since there is a 20mv drop across the reverse battery protection resistor (r1) then the regulated voltage drop from the battery to the vs pin is 40mv (typ). figure 6. powerpath configuration d LTC2952 dc/dc shdn g1 g2 v1 r9 r10 v2 m1 m2 pb en vs 2952 f06 wall adapter to system q2 battery q1 s1 c2 *external pull-up required * figure 7. reverse battery protection on v1 LTC2952 dc/dc shdn g1 g2 v1 v2 m1 m2 pb en * vs 2952 f07 q1 s1 wall adapter *minimize capacitance on v1 **external pull-up required q2 battery r12 1k ** pushbutton input and circuitry the pb pin is a high impedance input to an accurate com- parator with a 10a pull-up to an ldo regulated internal supply of 4v. the pb input comparator has a 0.775v falling trip threshold with 25mv hysteresis. protection circuitry allows the pb pin to operate over wide range from C6v to 28v with an esd hbm rating of 8kv. the pushbutton circuitry debounces the input into the pb pin that sets an internal on/off signal. this signal initiates a turn on/off power sequence. LTC2952 18 2952fb applications information the timing diagram in figure 8 shows the pb pin being debounced and setting an internal on/off signal. note that a high at the internal on/off signal indicates that the last event was a turn-on command and a low at the internal on/off signal indicates that the last event was a turn-off command. here specifically the turn-on command is a result of a pushbutton on event and the turn-off command is a result of a pushbutton off event. note that a complete pushbutton consists of a push event and a release event. the push event (falling edge) on and off debounce durations on the pb pin can be increased beyond the fixed internal 26ms by placing a capacitor on the ont and offt pins respectively. the following equa- tions describe the additional debounce time that a push event at the pb pin must satisfy before it is recognized as a valid pushbutton on or off. t ont = c ont ? (9.3m) t offt = c offt ? (9.3m) c ont and c offt are the ont and offt external program- ming capacitors respectively. note that during the push event of the pushbutton off, the int pin is asserted low after the initial 26ms debounce duration. the int pin asserts low when the pb pin is held low during the offt debounce duration and during the shutdown sequence. if the pb pin pulls high before the offt time ends, the int pin immediately turns high impedance. on the other hand, if the pb pin is still held low at the end of the offt time, the int pin continues to assert low throughout the ensuing shutdown sequence. on a release event (rising edge) of the pushbutton switch following a valid push event, the pb pin must be continu- ously held above its rising threshold (0.8v) for a fixed 26ms internal debounce time. in a typical application, the pb pin is connected to a pushbutton switch. if the switch exhibits high leakage current (>10a), connecting an external pull-up resistor to v1, v2 and/or vs (depending on the application) is recommended. furthermore, if the pushbutton switch is physically located far from the LTC2952s pb pin, signals may couple onto the high impedance pb input. placing a 0.1f capacitor from the pb pin to ground reduces the impact of signal coupling. additionally, parasitic series inductance may cause undesirable ringing at the pb pin. this can be minimized by placing a 5k resistor in series and located next to the switch. figure 8. pushbutton debounce timing diagram 2952 f08 pb ont cap offt cap internal on/off signal t offt t offt t ont LTC2952 20 2952fb figure 10. power-on and power-off sequence with kill deasserting en during kill off wait time wde pin. the watchdog timer can expire due to any of the following conditions: 1. no valid edge on the wde pin in a t wde (1.6s) time period after the rst pin transitions from pulling low to high impedance. 2. no valid edge on the wde pin in a t wde (1.6s) time period since the last valid edge on the wde pin while the rst pin is high impedance. as shown in the timing diagrams section, when the watchdog timer is allowed to expire while voltage at the vm pin is higher than 0.5v, the rst pin strongly pulls down to ground for t rst (200ms) before again becoming high impedance for t wde (1.6s). this will continue unless there is an edge at the wde pin, the voltage at vm goes below 0.5v, or the watchdog function is disabled (by leaving the wde in a hi-z state). in certain powerpath configurations where both of the ideal diode drivers are disabled, the watchdog function of the wde pin is also disabled. examples of such configura- tions are configuration c (figure 5) and configuration d (figure 6) when both of the ideal diode can be turned off due to a valid pushbutton off or a digital off command. power-on/power-off sequence figure 10 shows a normal power-on and power-off timing diagram. note that in this timing diagram only the clean internal on/off signal is shown. a transition at this in- ternal on/off signal can be caused by a valid debounced pushbutton on/off or a digital on/off through the mode input pins (m1/m2). in this timing sequence, the kill pin has been set low since power is first applied to the LTC2952. as soon as the internal on/off signal transitions high (t 1 ), the en pin goes high impedance and an internal 400ms (t kill , on blank ) timer starts. during this 400ms kill on blanking period, the input to kill pin is ignored and the en pin remains in its high impedance state. this kill on blanking period is designed to give the system sufficient time to power up properly. once the p/system powers on, it sets the kill pin high (t 2 ) indicating that proper power-up sequence is completed. failure to set kill pin high at the end of the 400ms kill on blanking time (t 3 ) will result in immediate system shutdown (see aborted power-on sequence segment). after the kill on blanking time expires, the system is now in normal operation with power turned on. when the internal on/off signal transitions low (t 4 ), a shutdown sequence is immediately started. from the start of the shutdown sequence, the system power will turn off in 400ms (t kill, off wait ), unless an edge (a high-to-low or low-to-high transition) at the wde pin is detected within the 400ms period to extend the wait period for another 400ms. this kill off wait time (400ms/cycle) is designed to allow the system to finish performing its housekeeping tasks before shutdown. once the p finishes performing its power-down operations, it can either let the 400ms kill off wait time expire on its own or set the kill pin low (t 5 ) immediately terminating the kill off wait time. when the kill off wait time expires, the LTC2952 sets en low, turning off the dc/dc converter connected to the en pin. when the dc/dc converter is turned off (en goes low), it can take a significant amount of time for its output level to decay to ground. in order to guarantee that the p has always powered down properly before it is restarted, another 400ms (enable lockout time, t en, lockout ) timer is started to allow for the dc/dc converter output power level to power down completely to ground. during this enable lockout time, the en pin remains in its low state. at the end of the 400ms enable lockout time (t 6 ), the LTC2952 goes into its reset state with the en pin remains strongly pulling down. applications information 2952 f10 kill en internal on/off signal t kill, on blanking t 1 t 2 t 3 t 4 t 5 t 6 don't care LTC2952 22 2952fb applications information setting up different configurations the various configurations discussed previously are sum- marized in table 2, including the ideal diode powerpath state (id1-primary, id2-secondary). note that an input above 0.515v (typical rising threshold) on the m1 and m2 pins is indicated with a 1 and an input below 0.500v (typical falling threshold) is represented by a 0. also, an enabled ideal diode driver is indicated with a 1 and a disabled driver is indicated with a 0. table 2. mode table mode description m1 m2 en id1 id2 0 both diodes enabled 0 0 0 1 1 1 both diodes enabled 0 0 1 1 1 2 primary diode off, secondary diode on 01001 3 primary diode off, secondary diode on 01101 4 powerpath off, pb overwrite 1 0 0 0 0 5 transitional powerpath off, pb overwrite 10111 6 pushbutton powerpath off 1 1 0 0 0 7 pushbutton powerpath on 1 1 1 1 1 in addition to the mode table, the mode transition diagram in figure 14 shows all possible interactions between the events on the pins (pb, m1 and m2) and the different modes of the LTC2952 powerpath behavior. using table 2 and figure 14, it is possible to configure the LTC2952 in many different ways beyond the four discussed in the operation and applications information sections. in modes 0 and 1, both of the ideal diode drivers are enabled all the time. a valid pushbutton toggles the mode between 0 and 1 (changing the state of the en pin) without ever turning off of the ideal diodes. these modes are used in configuration a and b (figures 3 and 4). in modes 2 and 3, only v2 provides power to the load connected at vs because the primary ideal diode driver is disabled and only the secondary ideal diode driver is en- abled. these modes are used in configuration b (figure 4). in modes 4 and 5 both of the ideal diodes are disabled and the input to the pb pin is ignored. note that mode 5 is a transitional mode. if there is no change at the m1 and m2 pin while in mode 5, the mode eventually transitions into mode 4 after a proper shutdown sequence. a rising edge at m1 in mode 1 or a falling edge at m2 in mode 7 is recognized as a digital off command, which causes a transition to mode 5. when a digital off com- mand is received, the en pin is driven low and the ideal diodes are disabled after a proper shutdown sequence involving the interrupt alert to the p ( int pin driven low)refer to the earlier sections for details on the shutdown sequence. note that since the pb input is ignored in both mode 4 and 5, the only way to turn on the powerpath from these two modes is a transition from 0 to 1 at the m2 pin. a transition from 0 to 1 at the m2 pin in modes 4 or 5 is interpreted as a digital on command. this digital on command causes the mode to transition from mode 4 or 5 to mode 7. in mode 7, both of the ideal diodes are enabled and the en pin goes high impedance. modes 4, 5 and 7 are used in configuration d (figure 6). notice that in mode 7, both the m2 pin and the pb pin have direct control over the en pin. a transition from 1 to 0 at the m2 pin in mode 7 is recognized as a digital off command. this digital off command causes a transition to mode 4 after a proper shutdown sequence. on the other hand, a valid pushbutton off mode 7 transitions the part to mode 6 after a proper shutdown sequence. in both mode 4 and mode 6 the en pin is driven low. modes 6 and 7 are used in configuration c (figure 5). in mode 4 the ideal diode driver circuitry is disabled, the en pin is driven low, and the pb input is ignored. on the other hand, in mode 6, although both of the primary and secondary ideal diodes are disabled and the en pin is set low, the pb input is not ignored. a valid pushbutton tran- sitions the part from mode 6 to mode 7, turning on both the ideal diodes and setting the en pin high impedance (turning on the dc/dc converter). LTC2952 23 2952fb figure 14. mode transition diagram m2 m1 m1 2952 f14 m1 m1 m2 mode 0 m1 = 0 m2 = 0 en = 0 g1 = on g2 = on valid pb valid pb mode 1 m1 = 0 m2 = 0 en = 1 g1 = on g2 = on m2 m2 pb control of en pin mode 2 m1 = 0 m2 = 1 en = 0 g1 = off g2 = on valid pb valid pb mode 3 m1 = 0 m2 = 1 en = 1 g1 = off g2 = on m2 mode 4 m1 = 1 m2 = 0 en = 0 g1 = off g2 = off (pb ignore) mode 5 m1 = 1 m2 = 0 en = 1 g1 = off g2 = off (pb ignore) m2 and pb control of en pin and ideal diodes function mode 6 m1 = 1 m2 = 1 en = 0 g1 = off g2 = off valid pb valid pb mode 7 m1 = 1 m2 = 1 en = 1 g1 = on g2 = on m2 digital on command m1 m1 m1 m1 m2 digital off command m2 digital on command digital off command applications information LTC2952 24 2952fb LTC2952 p lt1767-3.3 shdn** v out v in pfi g1 vm rst int g1stat pfo kill wde s1 g2 v1 v2 m1 m2 pb en vs ont c ont * 22nf gnd offt c offt * 68nf r3 1.3m *optional **shdn internally pulled up by the lt1767-3.3 2952 ta03 r4 100k q1 si6993dq wall adapter 12v to 25v 3.3v q2 si6993dq 9v battery r1 511k r2 100k r5 10k r8 10k r7 10k r6 10k wall adapter and battery automatic load switchover with pushbutton control, voltage monitors and watchdog typical applications wall adapter and battery automatic load switchover with simple on/off pushbutton control and voltage monitors for system power without p LTC2952 lt1767-2.5 shdn** v out v in pfi g1 vm int g1stat pfo kill wde g2 v1 s1 v2 m1 m2 pb en vs ont c ont * 22nf gnd offt c offt * 68nf r3 511k *optional **shdn internally pulled up by the lt1767-2.5 2952 ta02 r4 100k q1 si7913dn wall adapter 5v to 20v 2.5v q2 si7913dn 4.2v single cell li-ion battery r1 365k r2 100k r8 10k r7 1k r6 1k d2 d3 rst r5 1k d1 power low indicator bat off indicator bat low indicator LTC2952 25 2952fb LTC2952 p ltc1625 run/ss** v out v in pfi g1 vm rst int g1stat pfo kill wde g2 v1 v2 m1 m2 pb en vs ont c ont * 22nf gnd offt c offt * 68nf r3 1.78m *optional **run/ss internally pulled up by the ltc1625 2952 ta04 r4 100k si7941dp wall adapter 5v to 30v 3.3v q2 si7421dn q1 s1 q3 5v to 30v battery r9 845k r10 100k r1 511k r2 100k r5 10k r8 10k r7 10k r6 10k cvs 0.1f typical applications uninterruptible power supply with preferential wall adapter operation and automatic load switchover to battery with pushbutton control, voltage monitors and watchdog direct powerpath control with pushbutton control, voltage monitors and watchdog LTC2952 p g1 vm rst int g1stat pfo kill wde g2 v1 v2 m1 m2 pfi pb en s1 q1 q3 vs ont c ont * 22nf gnd offt c offt * 68nf r11 1k *optional 2952 ta05 wall adapter 5v si7925dn r1 511k r2 100k r5 10k r8 10k r7 10k r6 10k 4.2v single cell li-ion battery d4 power on/off indicator r3 845k r4 100k q4 si7925dn q2 cvs 0.1f LTC2952 26 2952fb typical applications critical system with primary supply and temporary battery backup with pushbutton control, voltage monitors and watchdog LTC2952 p ltc3728 run/ss** v out v in pfi s1 g1 vm rst int g1stat pfo kill wde g2 v1 v2 m1 m2 pb en vs ont c ont * 22nf gnd offt c offt * 68nf r3 1.82m *optional **run/ss internally pulled up by the ltc3728 2952 ta06 r4 100k q1 sub75p03-07 primary power 12v to 30v 3.3v q2 sub75p03-07 12v battery c2 0.1nf r9 2.15m r10 100k r1 511k r2 100k r5 10k r8 10k r7 10k r6 10k LTC2952 27 2952fb package description f package 20-lead plastic tssop (4.4mm) (reference ltc dwg # 05-08-1650) f20 tssop 0204 0.09 C 0.20 (.0035 C .0079) 0 C 8 0.25 ref 0.50 C 0.75 (.020 C .030) 4.30 C 4.50** (.169 C .177) 134 5 6 7 8910 111214 13 6.40 C 6.60* (.252 C .260) 20 19 18 17 16 15 1.10 (.0433) max 0.05 C 0.15 (.002 C .006) 0.65 (.0256) bsc 6.40 (.252) bsc 0.19 C 0.30 (.0075 C .0118) typ 2 millimeters (inches) dimensions do not include mold flash. mold flash shall not exceed .152mm (.006") per side dimensions do not include interlead flash. interlead flash shall not exceed .254mm (.010") per side * ** note: 1. controlling dimension: millimeters 2. dimensions are in 3. drawing not to scale recommended solder pad layout 0.45 0.05 0.65 bsc 4.50 0.10 6.60 0.10 1.05 0.10 please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings. LTC2952 28 2952fb package description 4.00 0.10 4.00 0.10 note: 1. drawing is proposed to be made a jedec package outline mo-220 variation (wggd-1)to be approved 2. drawing not to scale 3. all dimensions are in millimeters 4. dimensions of exposed pad on bottom of package do not include mold flash. mold flash, if present, shall not exceed 0.15mm on any side 5. exposed pad shall be solder plated 6. shaded area is only a reference for pin 1 location on the top and bottom of package pin 1 top mark (note 6) 0.40 0.10 2019 1 2 bottom viewexposed pad 2.00 ref 2.45 0.10 0.75 0.05 r = 0.115 typ r = 0.05 typ 0.25 0.05 0.50 bsc 0.200 ref 0.00 C 0.05 (uf20) qfn 01-07 rev a recommended solder pad pitch and dimensions apply solder mask to areas that are not soldered 0.70 0.05 0.25 0.05 0.50 bsc 2.00 ref 2.45 0.05 3.10 0.05 4.50 0.05 package outline pin 1 notch r = 0.20 typ or 0.35 45 chamfer 2.45 0.10 2.45 0.05 uf package 20-lead plastic qfn (4mm 4mm) (reference ltc dwg # 05-08-1710 rev a) please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings. LTC2952 29 2952fb information furnished by linear technology corporation is believed to be accurate and reliable. however, no responsibility is assumed for its use. linear technology corporation makes no representa- tion that the interconnection of its circuits as described herein will not infringe on existing patent rights. rev date description page number a 02/10 revised configuration b of figure 1 14 b 09/11 added information to typical applications drawings revised conditions for t ont, offt in electrical characteristics revised en, kill, and wde pin pin descriptions in pin functions added information to figures 1, 3, 4, 6, 7 and 8 updated values in applications information 1, 24, 25, 26, 30 4 10, 11 14 to 18 20, 21 revision history LTC2952 30 2952fb linear technology corporation 1630 mccarthy blvd., milpitas, ca 95035-7417 (408) 432-1900 fax: (408) 434-0507 www.linear.com linear technology corporation 2010 lt 0911 rev b ? printed in usa part number description comments ltc1479 powerpath controller for dual battery systems complete powerpath management for two batteries; dc power source, charger and backup ltc1726 micropower triple supply monitor for 2.5v/5v, 3.3v and adj adjustable reset and watchdog timeout ltc2900 programmable quad supply monitor adjustable reset, 10-lead msop and dfn packages ltc2901 programmable quad supply monitor adjustable reset and watchdog timer, 16-lead ssop package ltc2902 programmable quad supply monitor adjustable reset and tolerance, 16-lead ssop package ltc2903 precision quad supply monitor 6-lead sot-23 package ltc2904/ ltc2905 three-state programmable precision dual supply monitor adjustable tolerance, 8-lead sot-23 and dfn packages ltc2906/ ltc2907 dual supply monitor with one pin-selectable threshold and one adjustable input 0.5v adjustable threshold and three supply tolerances, 8-lead sot-23 and dfn packages ltc2908 precision six supply monitors 0.5v adjustable threshold, reset, 8-lead sot-23 and dfn packages ltc2950/ lttc2951 pushbutton on/off controller p pushbutton controller interface with programmable debounce on and off timing, 8-lead sot23 and dfn packages ltc4411 sot-23 ideal diode 2.6a forward current, 28mv regulated forward voltage ltc4412hv powerpath controller in thinsot? efficient diode-oring, automatic switching, 3v to 36v related parts LTC2952 p lt1767-3.3 shdn** v out v in pfi g1 vm rst int g1stat pfo kill wde g2 v1 v2 m1 m2 pb en vs ont c ont * 22nf gnd offt c offt * 68nf r3 1.3m *optional **shdn internally pulled up by the lt1767-3.3 2952 ta07 r4 100k q1 si6993dq wall adapter 12v to 25v 3.3v q2 si6993dq 9v battery 1k r1 511k r2 100k r5 10k r8 10k r7 10k r6 10k s1 wall adapter and battery automatic load switchover with reverse battery protection typical application |
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